By Antonio Carlos Schneider Beck, Carlos Arthur Lang Lisbôa, Luigi Carro
As embedded platforms turn into extra complicated, designers face a few demanding situations at various degrees: they should enhance functionality, whereas conserving power intake as little as attainable, they should reuse existent software program code, and whilst they should reap the benefits of the additional good judgment to be had within the chip, represented by means of a number of processors operating together. This ebook describes numerous ideas to accomplish such varied and interrelated objectives, by way of adaptability. assurance comprises reconfigurable structures, dynamic optimization suggestions equivalent to binary translation and hint reuse, new reminiscence architectures together with homogeneous and heterogeneous multiprocessor structures, communique matters and NOCs, fault tolerance opposed to fabrication defects and delicate error, and eventually, how you can mix numerous of those recommendations jointly to accomplish greater degrees of functionality and adaptability. The dialogue additionally contains the way to hire really expert software program to enhance this new adaptive method, and the way this new form of software program needs to be designed and programmed.
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Extra info for Adaptable Embedded Systems
Therefore, aiming to make a fair performance comparison among the high-end single core and the multiprocessor system, we have devised an 18-Core design composed of low-end processors that has the same area of the 4-issue superscalar processor and consumes the same amount of power. As shown in Fig. 85). 4 Energy Comparison The previous section shows that multiprocessor designs, in most cases, present better performance than superscalar processor considering the same area and power budget. Now, we wanted to demonstrate the behavior of both designs when one considers energy consumption.
The chip provided by ST is cheaper, faster and consumes less power than any processor that could perform the same task at real time. However, it cannot do anything more than MP3 decoding. For complex systems found nowadays, with a wide range of different applications being simultaneously executed on it, the Application-Specific approach would lead to a huge and very expensive die size, since a large number of different hardware components would be necessary. On the other hand, a GPP would be able to execute everything, but it is very likely that it would not satisfy either performance or energy constraints of this system.
Now, in Fig. 6, a more realistic assumption is considered: each hot spot would take five cycles to be executed after it was implemented in hardware. These extra cycles were added to give a hint on the impact of limited memory ports, communication or even reconfiguration time, in cases FPGA is used. When comparing this experiment with the previous one, it can be observed that, although the algorithms that present performance speedups are the same, the speedup levels varies a lot. 2 Heterogeneous Behavior of Applications and Systems 21 Fig.